Assistant Professor at Lyon 1/LIP (CASH team leader). Formerly Ensimag/Verimag (Synchrone team leader).

Contact Details

email :

Research office (LIP):

Matthieu Moy
Laboratoire d’Informatique du Parallélisme (LIP)
ENS Lyon
Office 353 S, 3rd Floor, next to the coffee corner
46 allée d’Italie
69 364 LYON
Access map: site Monod of ENS Lyon
Phone: +33 4 72 72 85 03

Teaching office (Doua):

Matthieu Moy
Université Lyon 1
Département Informatique
Bâtiment Nautibus - Office 12.051
23-25 Avenue Pierre de Coubertin
Phone: +33 4 72 44 83 67
Access map: Bâtiment Nautibus

Curriculum Vitæ (CV): matthieu-moy-cv-detaille.pdf

Latest articles

Most popular articles



Polyhedral model, Amaury Maillé, Bageshri Karkare, Bruno Ferres, Catherine Parent, Christophe Alias, Claire Maiza, Claude Helmstetter, David Monniaux, Florence Maraninchi, Frédéric Suter, Giovanni Funchal, Guillaume Salagnac, Hamza Rihani, Jérôme Cornet, Julien Henry, Karine Altisen, Kevin Marquet, Laure Gonnord, Ludovic Henrio, Martin Goyot, Mehdi Khosravian, Oussama Oulkaid, Pascal Raymond, Rémi Watrigant, Yanhong Liu


ac2lus, ACEplorer, Apron, ATMI, Chamilotools, Clang, CUDD, DCC, DPN, Encore language, GCC, Git, Java, jTLM, Kalray MPPA, LibTLMPWT, LLVM, LusSy, Lustre, NuSMV, PAGAI, Pinapa, PinaVM, sc-during, SimGrid, Spin, SPIP, SystemC, Tuleap, Uppaal, Verse, Vivado HLS, Yices, Z3


42, Abstract Interpretation, Implementation, Polyhedral model, High-level Synthesis (HLS), Compilation, Dataflow programs, Formal Verification, Future, Parallelism, Power-estimation, Programming languages, Real-Time Calculus, Simulation, SMT-solving, TLM, Transistor-level analysis of electronic circuits, Worst Case Execution Time

Type of Student

Bachelor of engineering, End of study project (engineer), L3 Internship, Master 1 project, Master 1 internship, CCI Internship, CIFRE Ph. D, Excellence Internship, IRL Ensimag, L2 Internship, M2R, Ph. D, Post-doc, TER UJF


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