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Dedicated Solver for Formal Verification of Electric Circuits with Multiple Power Supplies
Thursday 13 October 2022
View online : http://www.ens-lyon.fr/LIP/CASH/wp-...
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Also in this section
- [TAKEN] Dedicated compilation techniques for a domain-specific language (SystemC)
- [Taken] Applying Symbolic Model-Checking Techniques to Circuit Electric Verification
- [CANCELED] [M2 Research] Code Generation for Simulation of Parallel Process Networks
- [CANCELED][Ph.D] Formal Verification of Process Networks as Compiler Intermediate Representation
- [TAKEN] Parallel programming in modeling of embedded systems
- [TAKEN] Distributed Simulation for Embedded Systems
- [TAKEN] Visualisation graphique de traces de simulation de systèmes sur puces
- [TAKEN] Performance optimization for multi-core simulators
- [TAKEN] Cooperative and Parallel simulation: experimenting with the SystemC scheduler
- [TAKEN] Dedicated Compilation Techniques for SystemC (based on LLVM)
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