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Matthieu Moy
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Nabila Abdessaied
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Hanan Kanso
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[Taken] Theoretical complexity of graph-analysis for electrical circuit error detection
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Julien Henry (M2R)
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[Master 2 Recherche] Ordonnancement de processus sous contrainte de pipeline
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[TAKEN] Dedicated compilation techniques for a domain-specific language (SystemC)
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Improving Diagnosis Quality and Performances of a Formal Verification Tool for Electric Circuits at Transistor Level
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Samuel Jones
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Guillaume Sergent
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Amaury Maillé
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