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SMT-solving
Satisfiability Modulo Theory
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Improving Diagnosis for a Formal Verification Tool for Electrical Circuits at Transistor Level
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Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level
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Julien Henry (M2R)
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[TAKEN] Dedicated Solver for Formal Verification of Electric Circuits with Multiple Power Supplies
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Julien Henry (TER/IRL)
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Habilitation à Diriger des Recherches (HDR)
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Other keywords in this group
- 42
- Abstract Interpretation
- Implementation
- Polyhedral model
- High-level Synthesis (HLS)
- Compilation
- Dataflow programs
- Formal Verification
- Future
- Parallelism
- Power-estimation
- Programming languages
- Real-Time Calculus
- Simulation
- SMT-solving
- TLM
- Transistor-level analysis of electronic circuits
- Worst Case Execution Time
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